Supercomputer features

Iowa+State+Universitys+Pieter+Maris%2C+left%2C+and+James+Vary+will+get+a+head+start+on+scaling+up+their+computer+codes+for+the+Energy+Departments+next-generation+supercomputer.

Iowa State University’s Pieter Maris, left, and James Vary will get a head start on scaling up their computer codes for the Energy Department’s next-generation supercomputer.

Matthew Rezab

So you think your MacBook Pro packs a serious punch? Cori, the new supercomputer being developed by the National Energy Research Scientific Computing Center, can probably dance like a butterfly and sting like a bee compared to your PC.

FEATURES

  • Self-hosted architecture, not a co-processor, not an accelerator
  • Next-generation Intel® Xeon Phi™ Knights Landing (KNL) product with improved single-thread performance targeted for highly parallel computing
  • Intel® “Silvermont” architecture enhanced for high performance computing
  • Over 9,300 single-socket nodes in the system with each node > 3TeraFLOPS/s theoretical peak performance
  • Better performance per watt than previous generation Xeon Phi™ systems and 3X single-thread performance
  • MPI + OpenMP programming model 
  • AVX512 Vector pipelines with a hardware vector length of 512 bits (eight double-precision elements)
  • On-package, high-bandwidth memory, up to 16GB capacity with bandwidth projected to be 5X that of DDR4 DRAM memory
  • 64-128 GB of DRAM memory per node
  • Greater than 60 cores per node with support for four hardware threads each; more cores than current generation Intel Xeon Phi™
  • Cray Aries high speed “dragonfly” topology interconnect, cabinets, and cooling (same as in Edison)
  • Lustre filesystem with > 430 GB/sec I/O bandwidth and 28 PB of disk capacity
  • Intel, Cray, and GNU programming environments

 Installation will be mid-2016 in the new CRT building in Berkeley.